Analog Design Verification Engineer Program profile banner profile banner

Analog Design Verification Engineer Program

The Programme 

我们的创始人早就知道,要创建一家伟大的公司,需要建立一种特殊的文化才能实现长期发展。TI 的这种文化就是“践行我们的价值观”,而且我们在日常运营中将其奉为圭臬。 
我们的理想 

数十年来,通过半导体技术让电子产品更经济实用, 创造一个更美好的世界。我们在开展业务时始终将三大目标谨记于心:  
我们要发挥主人翁意识,长久运营公司。 
我们要适应不断变化的世界并取得成功。 
我们要把 TI 建设成为一家让我们自己引以为荣、希望比邻而居的企业。 
让所有的员工、客户、社区, 以及其他利益相关方都因我们的成功而受益。  

Responsibilities 

  • Implement the mixed-signal test-benches to apply stimulus and checks to verify DUT behavior. 
  • Utilize Verilog, Verilog-A, Verilog-AMS to stimulate and check mix-signal circuits.
  • Work with the design and systems teams to close bugs as they arise. 

Required Skills and Abilities

  • 2021 bachelor in Electrical Engineering. 
  • Experience in Mixed-signal IC Design. 
  • Good Communication skills (Written and Verbal). 
  • Understand the basic Digital and Analog design flow. 
  • Experience using Cadence, Hspice, Verilog, Verilog A or other simulation tools. 
  • Coding skill with Perl, OCEAN, etc is a plus. 
  • Fluent English and native Mandarin are required. 
     
     
Closed a year ago
Closed a year ago
  • Job type:Graduate Jobs
  • Disciplines:

    Engineering

  • Citizenships:

  • Locations:

    Shanghai

  • Closing Date:30th Nov 2020, 6:00 pm

Search

Enter an employer or university you want to find in our search bar.