- Develop advanced standard cell and GPIO libraries on advanced process technologies (6nm, 7nm, 12/16nm, 22/28nm, etc.)
- Take challenging tasks from circuit design to SOC design to achieve world-class PPA performance (high-performance, low-power, and area-effective)
Required Skills and Abilities
- Good knowledge of circuits design. Experience in digital circuit or analog design is preferred.
- Experience in Cadence/Synopsys/Mentor EDA tools and Linux/Unix environment is preferred
- CAD and script capability such as Python/Perl/Shell is preferred.
- Solid understanding of device scaling challenges and circuit-process technology interactions applicable for advanced FinFET nodes is a plus
- Experience in reliability (EM, high-temperature aging effects, etc.) is a plus
- Self-motivated and hard work
Closed 4 months ago
- Job type:Graduate Jobs
- Closing Date:8th May 2021, 6:00 pm