Employer Navigation

IC Sign off Engineer profile banner profile banner

IC Sign off Engineer

The Programme 



  • Responsible for checking the advanced chip function before fabrication. Given the verification, the chip can exhibit expecting high performance after fabrication 
  • Reliable flow setting, identify violation root cause, and provide the fixing strategy to achieve high quality chips. 
  • Professional at one domain of blow knowledge at least. Signoff team not only executes the advanced signoff skill, but also push the boundary of flow to reach higher quality and productivity. 
  • STA (static timing analysis): using commercial timing signoff EDA tool combining advanced on-chip timing analysis method (OCV) to achieve timing closure before tape-out. 
  • IR analysis: define the reasonable IR drop spec, and explore the opportunity to realize the function with sufficient voltage support and reasonable power consumption. 
  • PV (physical verification): verify and achieve the chip without DRC (design rule check) and LVS (layout versus schematic).
  • With the verification, the following fabrication can minimize the defect and reach high yield performance. 

Required Skills and Abilities 

  • MS degree or above in EE, CS, Physics or related domains. Experience in Digital IC design flow, especially signoff, is a plus 
    Innovative, persistence and flexible personality. 
  • For frequent cross team cooperation and customer support, excellent communication/presentation skill 
  • Excellent English skill, CET6 
  • Software skill, ex: tcl, python 
Closed 4 months ago
Closed 4 months ago
  • Job type:Graduate Jobs
  • Disciplines:

    Computer Science, Engineering Electrical

  • Citizenships:

  • Locations:


  • Closing Date:8th May 2021, 6:00 pm


Enter an employer or university you want to find in our search bar.